AXLinkIOtm Technology

  • 1 - 33Gbps

  • Patent-pending and novel

  • World’s lowest power, area and latency in segment

  • Silicon-proven in advanced FINFET technology

  • Processor Interconnect compatible and multi-protocol support

  • Fully configurable, portable and simple to integrate

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Silicon Performance at 32Gbps

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PRBS7

CLK

PRBS31


IP Portfolio for ASIC links

AXLinkIO IPs support a multitude of serial standards needed for chiplet and chip links

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AXDieIO

Die-to-Die and Die-to-OE Connectivity

AXLinkIO C2C

Chip-to-Chip and Chip-to-Module Connectivity

AXLinkIO MP

Multi-Protocol Interface Connectivity


Easy Integration

Decades of experience delivering and integrating high-speed SerDes IPs to volume production through several IP companies

World Class Support

  • Multilingual 24h support
  • Full support from IP delivery to production
  • Designated IP Applications Engineer
  • Direct access to IP IC Design team
  • Complete IP Deliverables

  • Physical layout view (GDSII)
  • CDL netlist
  • Layout exchange format LEF view
  • Liberty timing models (.lib)
  • Verilog model and testbenches
  • ATPG models
  • IBIS-AMI models
  • Master configuration software
  • Datasheet and application notes
  • Integration guides
  • Silicon characterization report

  • Configuration Software

  • User-friendly master configuration software
  • Complete IP register access
  • Extensive BIST programming features
  • Internal Eye Diagram generator

  • Reach out to us for our complete IP portfolio and next-generation developments!